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LT1248 Power Factor Controller
U
GND 1
- +
FEATURES
s s s s s s s s s
DESCRIPTIO
High Power Factor Over Wide Load Range with Line Current Averaging International Operation Without Switches Instantaneous Overvoltage Protection Minimal Line Current Dead Zone Typical 250A Start-Up Supply Current Rejects Line Switching Noise Synchronization Capability Low Quiescent Current: 9mA Fast 1.5A Peak Current Gate Driver
The LT(R)1248 provides active power factor correction for universal off-line power systems. By using fixed high frequency PWM current averaging, without the need for slope compensation, the LT1248 achieves far lower line current distortion with a smaller magnetic element than systems that use either peak-current detection or zero current switching approaches in both continuous and discontinuous modes of operation. The LT1248 uses a multiplier containing a square gain function from the voltage amplifier to reduce the AC gain at light output load and thus maintains low line current distortion and high system stability. The LT1248 also provides filtering capability to reject line switching noise which can cause instability when fed into the multiplier. Line current dead zone is minimized with low bias voltage at the current input to the multiplier. The LT1248 provides many protection features including peak current limiting and overvoltage protection, and can be operated at frequencies as high as 300kHz.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
s s
Universal Power Factor Corrected Power Supplies Preregulators Up To 1500W
BLOCK DIAGRA
VCC 16V TO 10V EN/SYNC 10 VSENSE 11 IAC 6 OVP 8 7.9V 7.5V 2.6V/ 2.2V
+ -
-
+
-
EA
+
+ - -
SS 13
12A
5V
+
ONE SHOT 200ns
-
+
W
U
VAOUT 7
VREF 9 7.5V VREF RUN
MOUT ISENSE 5 4
CAOUT PKLIM 3 2
VCC 15
2.2V
7A
+
M1
-
IA 32k I 2I I=AB IB M 200A2
IM
-
CA
+ - +
R R RUN S
Q 16 GTDR
0.7V SYNC OSC 1 6V
14 CSET
12 RSET
1248 BD
1
LT1248 ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW GND PKLIM CAOUT ISENSE MOUT IAC VAOUT OVP 1 2 3 4 5 6 7 8 16 GTDR 15 VCC 14 CSET 13 SS 12 RSET 11 VSENSE 10 EN/SYNC 9 VREF
Supply Voltage ....................................................... 27V GTDR Current Continuous ..................................... 0.5A GTDR Output Energy(Per Cycle) .............................. 5J IAC, RSET, PKLIM Input Current ............................. 20mA VSENSE, EN/SYNC, OVP Input Voltage ................... VMAX ISENSE, MOUT Input Current .................................. 5mA Operating Junction Temperature Range LT1248C ................................................ 0C to 100C LT1248I ........................................... - 40C to 125C Thermal Resistance (Junction-to-Ambient) N Package .................................................. 100C/W S Package ................................................... 120C/W Storage Temperature Range ..................-65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
ORDER PART NUMBER LT1248CN LT1248IN LT1248CS LT1248IS
N PACKAGE 16-LEAD PDIP S PACKAGE 16-LEAD NARROW PLASTIC SO
TJMAX = 125C, JA = 100C/W (N) TJMAX = 125C, JA = 120C/W (S)
Consult factory for Military grade parts.
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Maximum operating voltage (VMAX) = 25V, VCC = 18V, RSET = 15k to GND, CSET = 1nF to GND, IAC = 100A, ISENSE = 0V, CAOUT = 3.5V, VAOUT = 5V, OVP = 7.5V, no load on any outputs, unless otherwise noted.
PARAMETER Overall Supply Current (VCC in Undervoltage Lockout) Supply Current (Inactive) Supply Current, On VCC Turn-On Threshold (Undervoltage Lockout) VCC Turn-Off Threshold EN/SYNC Threshold, Rising EN/SYNC Threshold Hysteresis EN/SYNC Input Current Voltage Amplifier Voltage Amp Offset Voltage Input Bias Current Voltage Gain Voltage Amp Unity-Gain Bandwidth Voltage Amp Output High (Internally Clamped) Voltage Amp Output Low Voltage Amp Short-Circuit Current SS Current Current Amplifier Current Amp Offset Voltage ISENSE Bias Current Current Amp Voltage Gain Current Amp Unity-Gain Bandwidth Current Amp Output High Current Amp Output Low CONDITIONS VCC = Lockout Voltage - 0.2V EN/SYNC = 0V, VCC VMAX 11.5V VCC VMAX, CAOUT = 1V
q q q q q q
ELECTRICAL CHARACTERISTICS
MIN
TYP 0.25 0.5 8.5 16.5 10.5 2.6 0.40 -1 - 25
MAX 0.45 1.5 12.0 17.5 11.5 2.85 5 50 8 - 250
UNITS mA mA mA V V V V A A mV nA dB MHz V V mA A mV nA dB MHz V V
15.5 9.5 2.2 -5 - 50 -8 70
EN/SYNC = 0V 3V EN/SYNC 7V VAOUT = 3.5V VSENSE = 0V to 7V
q
q q
q q
11.3 5 5
VAOUT = 0V SS = 2.5V
q q q q
- 25 100 3 13.3 1.1 14 12 1 - 25 110 3 8.5 1.1
2 30 30 4 - 250
80
q q
7.2
2
2
U
W
U
U
WW
W
LT1248
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Maximum operating voltage (VMAX) = 25V, VCC = 18V, RSET = 15k to GND, CSET = 1nF to GND, IAC = 100A, ISENSE = 0V, CAOUT = 3.5V, VAOUT = 5V, OVP = 7.5V, no load on any outputs, unless otherwise noted.
PARAMETER Current Amplifier Current Amp Short-Circuit Current Input Range, ISENSE, MOUT (Linear Operation) Reference Reference Output Voltage VREF Load Regulation VREF Line Regulation VREF Short-Circuit Current VREF Worst Case Current Limit PKLIM Offset Voltage PKLIM Input Current PKLIM to GTDR Propagation Delay Multiplier Multiplier Output Current Multiplier Output Current Offset Multiplier Maximum Output Current Multiplier Gain Constant (Note 2) IAC Input Resistance Oscillator Oscillator Frequency CSET Ramp Peak-to-Peak Amplitude CSET Ramp Valley Voltage Synchronization Pulse Threshold on EN/SYNC Pin Synchronization Frequency Range Overvoltage Comparator Comparator Trip Voltage Ratio (VTRIP / VREF) Hysteresis OVP Bias Current OVP Propagation Delay Gate Driver Max GTDR Output Voltage GTDR Output High GTDR Output Low (Device Unpowered) GTDR Output Low (Device Active) Peak GTDR Current GTDR Rise and Fall Time GTDR Max Duty Cycle Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired IM Note 2: Multiplier Gain Constant: K = IAC (VAOUT - 2)2 0mA Load, 18V < VCC - 200mA Load, 11.5V VCC 15V VCC = 0V, 50mA Load (Sinking) 200mA Load (Sinking) 10mA Load 10nF from GTDR to GND 1nF from GTDR to GND 90
q q q q q q q
ELECTRICAL CHARACTERISTICS
CONDITIONS CAOUT = 0V
q q
MIN 5 - 0.3 7.39
q q q
TYP 14
MAX 30 1
UNITS mA V V mV mV mA V mV A ns A
IREF = 0mA, TA = 25C - 5mA < IREF < 0mA 11.5V < VCC < VMAX VREF = 0V Load, Line, Temperature
7.50 5 5 28 7.5
7.60 20 50 7.68 15
- 20 12 7.32 - 15
PKLIM = - 0.1V PKLIM Falling from 50mV to - 50mV IAC = 100A, RSET = 15k RAC = 1M from IAC to GND IAC = 450A, RSET = 15k, VAOUT = 7V, MOUT = 0V IAC from 50A to 1mA RSET = 15k, CSET = 1000pF RSET = 15k, CSET = 1500pF
q
- 50 400 35
- 100
q q
- 0.05 - 286 15 - 260 0.035 32 100 68 4.7 1.4 5.6
- 0.5 - 235 50 115 78 5.0 1.55 6.5 1.6
A A V -2 k kHz kHz V V V f NOM
q q
85 58 4.35 1.25
Pulse Low = 3.5V, High = 7V, Width > 200ns RSET = 15k, CSET = 1000pF
4.5
q
1.2 1.04 1.05 0.35 - 50 100 12 VCC - 3.0 0.9 0.5 0.2 2 25 96 15
1.06 V - 250 nA ns 17.5 1.5 1 0.4 V V V V V A ns %
OVP = 7.5V
q
3
LT1248
TYPICAL PERFOR A CE CHARACTERISTICS
Voltage Amplifier Open-Loop Gain and Phase
100 80 GAIN 60
GAIN (dB)
40 20 0 -20
-60 -80
GAIN (dB)
PHASE
10
100
1k 10k 100k FREQUENCY (Hz)
Reference Voltage vs Temperature
7.536 7.524
REFERENCE VOLTAGE (V) 300
7.512 7.500 7.488 7.476 7.464 7.452 7.440 7.428 -75 -50 -25 0 25 50 75 100 125 150 JUNCTION TEMPERATURE (C)
1248 G03
IM (A)
Supply Current vs Supply Voltage
11 10 9 TJ = -55C 18.5 18.0 17.5 17.0 16.5 16.0 15.5 15.0 14.5 14.0 13.5 13.0 10 21 SUPPLY VOLTAGE (V) 32
1248 G05
SUPPLY CURRENT (mA)
GTDR VOLTAGE (V)
7 6 5 4 3 2 1 0
GTDR VOLTAGE (V)
8 TJ = 125C TJ = 25C
4
UW
Current Amplifier Open-Loop Gain and Phase
0 -20 -40
100 80 GAIN 60 40 20 0 -20 -40 -60 -80 -100 -120 10M
1148 G02
0 -20
-100 -120 10M
1148 G01
PHASE (DEG)
PHASE (DEG)
PHASE
1M
10
100
1k 10k 100k FREQUENCY (Hz)
1M
Multiplier Current
VAOUT = 7V VAOUT = 6.5V VAOUT = 6V 150 VAOUT = 5V VAOUT = 4.5V VAOUT = 4V VAOUT = 3.5V 0 VAOUT = 3V VAOUT = 2.5V 500
1248 G04
VAOUT = 5.5V
0
250 IAC (A)
GTDR Source Current
1.1
VCC = 18V
GTDR Sink Current
1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 TA = 25C TA = 125C 0 60 120 180 240 SINK CURRENT (mA) 300
1248 G07
TJ = 125C TJ = 25C TJ = -55C
TA = -55C
0
-120 -180 -240 - 60 SOURCE CURRENT (mA)
-300
1248 G06
LT1248
TYPICAL PERFOR A CE CHARACTERISTICS
GTDR Rise and Fall Time
400 550 500 450
SUPPLY CURRENT (A)
300
TIME (ns)
350 300 250 200 150 100 50 0 -55C 25C 125C
FREQUENCY (kHz)
FALL TIME 200 RISE TIME 100 NOTE: GTDR SLEWS BETWEEN 1V AND 16V 0 0 10 20 30 40 LOAD CAPACITANCE (nF) 50
1248 G08
GTDR Maximum Duty Cycle vs RSET and CSET
1.00 0.99 0.98 1.1 1.0 0.9
SUPPLY CURRENT (mA)
MAXIMUM DUTY CYCLE
0.97 0.96 0.95 0.94 0.93 0.92 0.91 0.90 200 600 1000 RSET = 10k RSET = 15k RSET = 20k RSET = 30k 1800 1400 CSET CAPACITANCE (pF) 2200
1248 G11
Synchronization and Shutdown Thresholds at EN/SYNC Pin
-44 -40 -36 SHUTDOWN THRESHOLD SYNCHRONIZATION THRESHOLD TJ = - 55C TJ = 25C TJ = 125C -22 -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 1 2 345 678 EN/SYNC VOLTAGE (V) 9 10 0
EN/SYNC CURRENT (A)
-28 -24 -20 -16 -12 -8 -4 0
SS CURRENT (A)
TJ = -55C TJ = 25C TJ = 125C
MOUT CURRENT (mA)
-32
UW
1248 G13
Start-Up Supply Current vs Supply Voltage
500 450 400 350 300 250 200 150 100 50
0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
1248 G09
Frequency vs RSET and CSET
RSET = 10k RSET = 15k RSET = 20k RSET = 30k
400
0 200
600
1000 1800 1400 CSET CAPACITANCE (pF)
2200
1248 G10
Shutdown Mode Supply Current and Reference Voltage
1.1 EN/SYNC 1.8V 1.0 0.9
REFERENCE VOLTAGE (V)
0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 REFERENCE VOLTAGE TJ 125C 16 SUPPLY VOLTAGE (V) SUPPLY CURRENT -55C TJ 25C TJ = 125C
0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 32
1248 G12
SS Pin Characteristics
1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 -3.5 0 4 SS VOLTAGE (V) 8
1248 G14
MOUT Pin Characteristics
TJ = 125C TJ = 25C TJ = -55C
-4.0
-2.4
1.2 -1.2 0 MOUT VOLTAGE (V)
2.4
1248 G15
5
LT1248
TYPICAL PERFOR A CE CHARACTERISTICS
RSET Voltage vs Current
120 100 80 60 40 20 0 -20 -40 -60 -80 -100 0 -0.2 -0.8 -0.4 -0.6 RSET CURRENT (mA) -1.0
1248 G16
PKLIM CURRENT (A)
VRSET - VREF (mV)
PI FU CTIO S
Pin 1 (GND). Pin 2 (PKLIM): The threshold of the peak current limit comparator is GND. To set current limit, a resistor divider can be connected from VREF to current sense resistor. Pin 3 (CAOUT): This is the output of the current amplifier that senses and forces the line current to follow the reference signal that comes from the multiplier by commanding the pulse width modulator. When CAOUT is low, the modulator has zero duty cycle. Pin 4 (ISENSE): This is the inverting input of the current amplifier. This pin is clamped at - 0.6V by an ESD protection diode. Pin 5 (MOUT): This is the multiplier high impedance current output and the noninverting input of the current amplifier. This pin is clamped at - 0.6V and 2V. Pin 6 (IAC): This is the AC line voltage sensing input to the multiplier. It is a current input that is biased at 2V to minimize the crossover dead zone caused by low line voltage. At the pin, a 32k resistor is in series with the current input, so that a lowpass RC can be used to filter out the switching noise from the high impedance lines. Pin 7 (VAOUT): This is the output of the voltage error amplifier. The output is clamped at 13.5V. When the output goes below 2.5V, the multiplier output current is zero. Pin 8 (OVP): This is the input to the overvoltage comparator. The threshold is 1.05 times the reference voltage. When the comparator trips, the multiplier is quickly inhibited and outputs no current. Figure 4 in the Applications Information section shows how to set overvoltage threshold with only one additional resistor. Pin 9 (VREF): This is the 7.5V reference. When either VCC or EN/SYNC goes low, VREF will stay at 0V. VREF biases most of the internal circuity and can source up to 5mA externally. Pin 10 (EN/SYNC): This pin has two functions. When it goes below 2.6V, the chip goes into shutdown mode and draws little current. Pulses at this pin that go below the 5V threshold will synchronize the chip. The synchronizing pulses should have an on-time of at least 200ns for the LT1248 resetting circuit to work. Pin 11 (VSENSE): This is the inverting input to the voltage amplifier.
6
UW
PKLIM Pin Characteristics
-360
TJ = 125C TJ = 25C TJ = -55C
-300 -240 -180 -120 -60 0 60 120 180 240 300 -0.8
TJ = 125C TJ = 25C TJ = -55C
0.4 -0.4 0 PKLIM VOLTAGE (V)
0.8
1248 G17
U
U
U
LT1248 PI FU CTIO S
Pin 12 (RSET): A resistor from RSET to GND sets the oscillator charging current and the maximum multiplier output current which is used to limit the maximum line current. IM(MAX) = 3.75V/RSET Pin 13 (SS): Soft-Start. When either VCC or EN/SYNC goes low, the SS pin will stay at 0V. With a capacitor from the pin to GND, the 12A charging current slowly brings up the SS to 8V; below 7.5V SS is the reference input to the voltage amplifier. At supply dropout or EN/SYNC low, the soft start capacitor will be quickly discharged. Pin 14 (CSET): The capacitor from this pin to GND, and RSET, determine oscillator frequency. The oscillator ramp is 5V, and the frequency = 1.5/(RSET * CSET). Pin 15 (VCC): This is the supply for the chip. The LT1248 has a very fast gate driver required to fast charge high power MOSFET gate capacitance. High current spikes occur during charging. For good supply bypass, a 0.1F ceramic capacitor in parallel with a low ESR electrolytic capacitor, 56F or higher is required in close proximity to IC GND. Pin 16 (GTDR): The MOSFET gate driver is a 1.5A fast totem pole output. It is clamped at 15V, but capacitive loads like MOSFET gates may cause overshoot. A gate series resistor of at least 5 will prevent the overshoot.
APPLICATI
Error Amplifier
S I FOR ATIO
The error amplifier has a 100dB DC gain and 3MHz unitygain frequency. The output is internally clamped at 13.5V. The noninverting input is tied to the 7.5V VREF through a diode and can be pulled down from the SS (soft-start) pin. Current Amplifier The current amplifier has a 110dB DC gain, 3MHz unitygain frequency, and a 2V/s slew rate. It is internally clamped at 8.5V. Note that in the current averaging operation, high gain at twice the line frequency is necessary to minimize line current distortion. Because CAOUT may need to swing 5V over one line cycle at high line condition, 14mV AC will be needed at the inputs of the current amplifier for a gain of 350 at 120Hz. Especially at light load when the current loop reference signal is small, lower gain will distort the reference signal and line current. If signal gain at switching frequency is too high, the system behaves more like a current mode system and can cause subharmonic oscillation. Therefore, the current amplifier should be compensated to have a gain of less than 15 at the switching frequency, but more than 250 at twice the line frequency.
IM (A)
U
W
U
U
UO
U
U
Multiplier The multiplier is a current multiplier with high noise immunity in a high power switching environment. The current gain is: IM = (IAC * IEA2)/(200A)2, with IEA = (VAOUT - 2V)/25k. With a square function, because of the lower gain at light power load, system stability is maintained and line current distortion caused by the line frequency AC
300 VAOUT = 7V VAOUT = 6.5V VAOUT = 6V 150 VAOUT = 5V VAOUT = 4.5V VAOUT = 4V VAOUT = 3.5V 0 VAOUT = 3V VAOUT = 2.5V 500
1248 G04
VAOUT = 5.5V
0
250 IAC (A)
Figure 1. Multiplier Current IM vs IAC and VAOUT
7
LT1248
APPLICATI S I FOR ATIO
ripple fed back to the error amplifier is minimized. Note that switching ripple on the high impedance lines could get into the multiplier from the IAC pin and cause instability. The LT1248 provides an internal 25k resistor in series with the low impedance multiplier current input so that only a capacitor from the IAC pin to GND is needed to filter out the noise. The maximum multiplier output current, which limits the system line current, is set by the RSET according to the formula: IM(MAX) = 3.75V/RSET. Oscillator Frequency and Maximum Line Current Settling Oscillator frequency is set by RSET and CSET. Ramp amplitude is 5V and CSET charging current is set by VREF/RSET. Typical discharging time for CSET = 1nF is 250ns. RSET should always be determined first to set the maximum multiplier output current for system line current limit. For a 300W preregulator, with RSET = 15k, IM(MAX) = 3.75V/15k = 250A. With a 4k resistor RREF from MOUT to the 0.2 line current sense resistor RS, the line current limit is: (IM * 4k)/RS. As a general rule, RS is chosen according to: RS = IM(MAX) * RREF * VLINE(MIN) K(1.414)POUT(MAX) where POUT(MAX) is the maximum power output and K is usually between 1.1 and 1.3 depending on efficiency and resistor tolerance. With RSET selected, CSET can then be determined by: CSET = 1.5/(Frequency * RSET). For 100kHz, CSET = 1.5/(100kHz * 15k) = 1nF. For optional double protection, the LT1248 provides a current limit comparator. When the comparator trips at 0V, the GTDR pin quickly goes low to shut off the MOS switch. A resistor divider from VREF to RS (Figure 2) senses the voltage across the line current sense resistor and the current limit is set by: ILINE = [(7.5V/R1) + 50A](R2/RS), where 50A is IPKLIM.
R2 1.6k R1 10k 7.5V VREF
+
RS IPKLIM C1 1nF
-
0.2
PKLIM
ILINE
C1 IS TO REJECT NOISE, CURRENT LIMIT DELAY IS ABOUT 2s.
Figure 2
8
U
With ILINE and RS chosen, let R1 = 10k, then R2 = (ILINE * RS )/0.8mA. Always use RSET to set the primary line current limit. The PKLIM comparator is only for secondary protection. The secondary limit should be higher than the primary limit; 6.5A is good (5A for primary limit) for a 300W regulator. When line current reaches the primary limit, VOUT drops to keep the line current constant, and system stability is still maintained by the current loop which is controlled by the current amplifier. When line current reaches the secondary limit, the comparator controls the system and loop hysteresis may occur and can cause audible noise. Synchronization The LT1248 can be synchronized to a frequency that is up to 1.6 times the natural frequency. With a 200ns one-shot timer on-chip, the LT1248 provides flexibility on the synchronizing pulse width. Because the EN/SYNC pin also serves the chip shutdown function, the pulses at the pin should not go below 3V and must go below 5V with widths greater than 200ns. The Figure 3 circuit will synchronize the LT1248.
VREF 30k 1N4148 200k EN/SYNC 1N4685 3.6V VN2222 SYNC PULSE AT LEAST 200ns
1248 F03
W
U
UO
VCC
Figure 3
Overvoltage Protection Because of the slow loop response necessary for power factor correction, output overshoot can occur with sudden load removal or reduction. To protect the power components and output load, the LT1248 provides an overvoltage comparator which senses the output voltage and quickly shuts off the current switch. In Figure 4, because there is no DC current going through R3, R1 and R2 set the regulator output DC level: VOUT = VREF[(R1 + R2)/R2], with R1 = 1M, R2 = 20k, VOUT is 382V.
- +
1248 F02
LT1248
APPLICATI
S I FOR ATIO
Note that VSENSE is the summing node and it stays at 7.5V. When overshoot occurs on VOUT, the overcurrent from R1 will go through R2 as well as R3. Amplifier feedback will keep VSENSE locked at 7.5V. The equivalent AC resistance, seen by the comparator input pin OVP, is R2 in parallel with R3, which is 10k. Therefore, with the comparator trip level of 1.05VREF and R3 of 20k, the comparator trips when VOUT overshoot exceeds 10%. Overvoltage trip level:
R2 + R3 %VOUT = 5% R3
MOUT is a high impedance current output. In the current loop, offset line current is determined by multiplier offset current and input offset voltage of the current amplifier. A - 4mV current amplifier VOS translates into 20mA line current and 5W input power for 250V line if 0.2 sense resistor is used. Under no load or when the load power is less than this offset input power, VOUT would slowly charge up to an overvoltage state because the overvoltage comparator can only reduce multiplier output current to zero. This does not guarantee zero output current if the current amplifier has offset. To regulate VOUT under this condition, the amplifier M1 (see Block Diagram), becomes active in the current loop when VAOUT goes down to 2.2V. The M1 can put out up to 7A to the resistor at the ISENSE pin to cancel any current amplifier negative VOS and keep VOUT error to within 2V.
0.047F
REGULATOR OUTPUT VOUT = 382V R3 20k VSENSE
C1 0.47F
330k
R1 1M
- + ERROR AMP
VAOUT
VREF = 7.5V R2 20k OVP LT1248 -
+ 1.05VREF
OVERVOLTAGE COMPARATOR
1248 F04
Figure 4 Figure 6
U
Undervoltage Lockout The LT1248 turns on when VCC is higher than 16V and remains on until VCC falls below 10V, whereupon the chip enters the lockout state. In the lockout state, the LT1248 only draws 250A, the oscillator is off, and the VREF and the GTDR pins remain low to keep the power MOSFET off. Start-Up and Supply Voltage The LT1248 draws only 250A before the chip starts at 16V on VCC. To trickle start, a 90k resistor from the power line to VCC supplies the trickle current and C4 holds the VCC up while switching starts. Then the auxiliary winding takes over and supplies the operating current. Note that D3 and the large value C3, in both Figures 5 and 6, are only necessary for systems that have sudden large load variation down to minimum load and/or very light load conditions. Under these conditions, the loop may exhibit a start/ restart mode because switching remains off long enough for C4 to discharge below 10V. The C3 will hold VCC up until switching resumes. For less severe load variations, D3 is replaced with a short and C3 is omitted. The turns ratio between the primary winding and the auxiliary winding determines VCC according to:
LINE MAIN INDUCTOR NP NS D1 R1 90k, 1W D3
W
U
UO
+
D2
VCC C1 2F C2 2F
+
+
C3 390F
+
C4 56F
1248 F05
Figure 5
C2 1000pF LINE MAIN INDUCTOR
D2
D3
R1 90k 1W
+
D1
C3 390F
18V
+
VCC
C4 56F
1248 F06
9
LT1248
APPLICATI
S I FOR ATIO
VOUT/(VCC - 2V) = NP/NS. For 382V VOUT and 18V VCC, Np/Ns 19.
In Figure 6, a new technique for supply voltage eliminates the need for an extra inductor winding. It uses capacitor charge transfer to generate a constant current source which feeds a Zener diode. Current to the Zener is equal to (VOUT - VZ)(C)(f), where VZ is Zener voltage and f is switching frequency. For VOUT = 382V, VZ = 18V, C = 1000pF, and f = 100kHz, Zener current will be 36mA. This is enough to operate the LT1248, including the FET gate drive. Normally soft-start is not needed because the LT1248 has overcurrent limit and overvoltage protection. If soft-start is used with a 0.01F capacitor on SS pin, VOUT ramps up slower during start-up. Then C4 has to hold VCC longer, and the circuit may not start. Increasing C4 to 100F ensures start-up, but start-up time will be extended if the same 90k trickle charge resistor is used. Output Capacitor The peak-to-peak 120Hz output ripple is determined by:
VP-P = (2) (ILOAD(DC))(Z)
where ILOAD(DC): DC load current. Z: capacitor impedance at 120Hz. For 180F at 300W load, ILOAD(DC) = 300W/385V = 0.78A, VP-P = 2 * 0.78A * 7.4 = 11.5V. If less ripple is desired, higher capacitance should be used. The selection of the output capacitor should also be based on the operating ripple current through the capacitor. The ripple current can be divided into three major components. The first is at 120Hz; it's RMS value is related to the DC load current as follows:
I1RMS 0.71 * ILOAD(DC)
The second component contains the PF switching frequency ripple current and its harmonics. Analysis of the ripple is complicated because it is modulated with a 120Hz signal. However computer numerical integration and Fourier analysis approximate the RMS value reasonably close to the bench measurements. The RMS value is about 0.82A at a typical condition of 120VAC, 200W load. This ripple is line-voltage dependent, and the worst case is at low line.
I2RMS = 0.82A at 120VAC, 200W
10
U
The third component is the switching ripple from the load, if the load is a switching regulator.
I3RMS ILOAD(DC)
W
U
UO
For the United Chemicon KMH 400V capacitor series, ripple current multiplier for currents at 100kHz is 1.43. The equivalent 120Hz ripple current can be then found:
IRMS = (I1RMS)2 + (I2RMS/1.43)2 + (I3RMS/1.43)2
For a typical system that runs at an average load of 200W and 385V output:
ILOAD(DC) = 0.52A I1RMS 0.71 * 0.52A = 0.37A I2RMS 0.82A at 120VAC I3RMS ILOAD(DC) = 0.52A IRMS = (0.37A)2 +(0.82A/1.43)2 +(0.52A/1.43)2 = 0.77A
The 120Hz ripple current rating at 105C ambient is 0.95A for the 180F KMH 400V capacitor. The expected life of the output capacitor may be calculated from the thermal stress analysis:
(105C+TK) - (TA+TO)
L = LO * 2
10
where:
L: expected life time LO: hours of load life at rated ripple current and rated ambient temperature. TK: Capacitor internal temperature rise at rated condition. TK = (I2R)/(KA). Where I is the rated current, R is capacitor ESR, and KA is a volume constant. TA: Operating ambient temperature. TO: Capacitor internal temperature rise at operating condition.
In our example LO = 2000 hours and TK = 10C at rated 0.95A. TO can then be calculated from:
TK = (IRMS/0.95A)2 * TK = (0.77A/0.95A)2 * 10C = 6.6C
Assuming the operating ambient temperature is 60C, the approximate life time is:
LO 2000 * 2
(105C +10C) - (60+ 6.6C) 10
57,000 hours
For longer life, a capacitor with a higher ripple current rating or parallel capacitors should be used.
LT1248
TYPICAL APPLICATI
T 90V TO 270V EMI FILTER
6A
0.047F
20k
0.47F
330k
VCC 16V TO 10V 2.6V/2.2V 10 EN/SYNC VSENSE IAC OVP 7.5V
+ -
- +
1M
11
6 8 4.7nF
7.9V
- -
50k 13 0.01F
12A SS
5V
+
ONE SHOT 200ns
CSET * 1. COILTRONICS CTX02-12236-1 (TYPE 52 CORE) AIR MOVEMENT NEEDED AT POWER LEVEL GREATER THAN 250W. 2. COILTRONICS CTX02-12295 (MAGNETICS Kool M(R) 77930 CORE) ** SEE START-UP AND SUPPLY VOLTAGE SECTION FOR VCC GENERATOR. THIS SCHOTTKY DIODE IS TO CLAMP GTDR WHEN MOS SWITCH TURNS OFF. PARASITIC INDUCTANCE AND GATE CAPACITANCE MAY TURN ON CHIP SUBSTRATE DIODE AND CAUSE ERRATIC OPERATIONS IF GTDR IS NOT CLAMPED. 1000pF
Kool M is a registered trademark of Magnetics, Inc.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
-
0.7V
+
UO
300W, 382V Preregulator
750H* MURH860 VOUT
+ -
IRF840 1M 1% 20k 1%
+
180F
RS 0.2 RREF 4k 4k
100pF VCC = 18V** 1nF
+
20k PKLIM GND
0.1F VAOUT VREF MOUT
56F 35V 15 VCC
7
9 7.5V VREF
5
4
ISENSE
3 CAOUT
2
1
- +
RUN 2.2V 7A
+
M1
- -
EA
+ +
IA I 2I I=AB IB M 200A2 32k
IM
- +
CA
- +
R R RUN S
Q
GTDR 16 10
OSC SYNC
16V
1N5819
14
12
RSET 15k
1248 TA01
11
LT1248 PACKAGE DESCRIPTIO U
Dimensions in inches (millimeters) unless otherwise noted.
N Package 16-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.770* (19.558) MAX 16 15 14 13 12 11 10 9
0.300 - 0.325 (7.620 - 8.255)
0.130 0.005 (3.302 0.127) 0.020 (0.508) MIN
0.045 - 0.065 (1.143 - 1.651)
0.009 - 0.015 (0.229 - 0.381)
0.065 (1.651) TYP 0.125 (3.175) MIN 0.018 0.003 (0.457 0.076)
0.255 0.015* (6.477 0.381)
(
+0.035 0.325 -0.015 +0.889 8.255 -0.381
)
1
2
3
4
5
6
7
8
N16 1098
0.100 (2.54) BSC
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
S Package 16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.386 - 0.394* (9.804 - 10.008) 0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0.053 - 0.069 (1.346 - 1.752) 0 - 8 TYP 0.228 - 0.244 (5.791 - 6.197) 0.150 - 0.157** (3.810 - 3.988) 0.004 - 0.010 (0.101 - 0.254) 16 15 14 13 12 11 10 9
0.016 - 0.050 (0.406 - 1.270)
0.014 - 0.019 (0.355 - 0.483) TYP
0.050 (1.270) BSC
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
S16 1098
1
2
3
4
5
6
7
8
RELATED PARTS
PART NUMBER LT1103 LT1249 LT1508 LT1509 DESCRIPTION Off-Line Switching Regulator PFC in SO-8 Power Factor and PWM Controller Power Factor and PWM Controller COMMENTS Universal Off-Line Inputs with Outputs to 100W Simplified PFC Design with Minimal Part Count Voltage Mode PWM, Simplified PFC Design Complete Solution for Universal Off-Line Switching Power Supplies
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
1248fd LT/GP 0799 2K REV D * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1993

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